Robin Gareus
8875e8b1d9
the proper check using compiler flags would be defined(__ARM_NEON) || defined(__aarch64__) however explicit wscript defined "ARM_NEON_SUPPORT" is prefereable.
519 lines
9.4 KiB
C++
519 lines
9.4 KiB
C++
/*
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* Copyright (C) 2020 Ayan Shafqat <ayan.x.shafqat@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "ardour/mix.h"
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#ifdef ARM_NEON_SUPPORT
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#include <arm_acle.h>
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#include <arm_neon.h>
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#define IS_ALIGNED_TO(ptr, bytes) (((uintptr_t)ptr) % (bytes) == 0)
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#ifdef __cplusplus
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#define C_FUNC extern "C"
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#else
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#define C_FUNC
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#endif
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C_FUNC float
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arm_neon_compute_peak(const float *src, uint32_t nframes, float current)
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{
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float32x4_t vc0;
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// Broadcast single value to all elements of the register
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vc0 = vdupq_n_f32(current);
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// While pointer is not aligned, process one sample at a time
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while (!IS_ALIGNED_TO(src, sizeof(float32x4_t)) && (nframes > 0)) {
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float32x4_t x0;
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x0 = vld1q_dup_f32(src);
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x0 = vabsq_f32(x0);
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vc0 = vmaxq_f32(vc0, x0);
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++src;
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--nframes;
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}
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// SIMD portion with aligned buffers
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do {
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while (nframes >= 8) {
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float32x4_t x0, x1;
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x0 = vld1q_f32(src + 0);
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x1 = vld1q_f32(src + 4);
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x0 = vabsq_f32(x0);
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x1 = vabsq_f32(x1);
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vc0 = vmaxq_f32(vc0, x0);
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vc0 = vmaxq_f32(vc0, x1);
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src += 8;
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nframes -= 8;
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}
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while (nframes >= 4) {
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float32x4_t x0;
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x0 = vld1q_f32(src);
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x0 = vabsq_f32(x0);
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vc0 = vmaxq_f32(vc0, x0);
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src += 4;
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nframes -= 4;
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}
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while (nframes >= 2) {
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float32x2_t x0;
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float32x4_t y0;
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x0 = vld1_f32(src); // Load two elements
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x0 = vabs_f32(x0); // Compute ABS value
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y0 = vcombine_f32(x0, x0); // Combine two vectors
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vc0 = vmaxq_f32(vc0, y0);
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src += 2;
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nframes -= 2;
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}
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} while (0);
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// Do remaining samples one frame at a time
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while (nframes > 0) {
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float32x4_t x0;
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x0 = vld1q_dup_f32(src);
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x0 = vabsq_f32(x0);
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vc0 = vmaxq_f32(vc0, x0);
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++src;
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--nframes;
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}
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// Compute the max in register
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do {
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float32x2_t vlo = vget_low_f32(vc0);
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float32x2_t vhi = vget_high_f32(vc0);
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float32x2_t max0 = vpmax_f32(vlo, vhi);
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float32x2_t max1 = vpmax_f32(max0, max0); // Max is now at max1[0]
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current = vget_lane_f32(max1, 0);
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} while (0);
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return current;
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}
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C_FUNC void
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arm_neon_find_peaks(const float *src, uint32_t nframes, float *minf, float *maxf)
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{
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float32x4_t vmin, vmax;
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// Broadcast single value to all elements of the register
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vmin = vld1q_dup_f32(minf);
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vmax = vld1q_dup_f32(maxf);
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// While pointer is not aligned, process one sample at a time
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while (!IS_ALIGNED_TO(src, sizeof(float32x4_t)) && (nframes > 0)) {
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float32x4_t x0;
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x0 = vld1q_dup_f32(src);
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vmax = vmaxq_f32(vmax, x0);
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vmin = vminq_f32(vmin, x0);
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++src;
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--nframes;
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}
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// SIMD portion with aligned buffers
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do {
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while (nframes >= 8) {
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float32x4_t x0, x1;
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x0 = vld1q_f32(src + 0);
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x1 = vld1q_f32(src + 4);
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vmax = vmaxq_f32(vmax, x0);
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vmax = vmaxq_f32(vmax, x1);
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vmin = vminq_f32(vmin, x0);
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vmin = vminq_f32(vmin, x1);
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src += 8;
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nframes -= 8;
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}
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while (nframes >= 4) {
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float32x4_t x0;
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x0 = vld1q_f32(src);
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vmax = vmaxq_f32(vmax, x0);
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vmin = vminq_f32(vmin, x0);
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src += 4;
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nframes -= 4;
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}
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while (nframes >= 2) {
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float32x2_t x0;
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float32x4_t y0;
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x0 = vld1_f32(src); // Load two elements
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y0 = vcombine_f32(x0, x0); // Combine two vectors
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vmax = vmaxq_f32(vmax, y0);
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vmin = vminq_f32(vmin, y0);
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src += 2;
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nframes -= 2;
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}
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} while (0);
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// Do remaining samples one frame at a time
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while (nframes > 0) {
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float32x4_t x0;
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x0 = vld1q_dup_f32(src);
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vmax = vmaxq_f32(vmax, x0);
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vmin = vminq_f32(vmin, x0);
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++src;
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--nframes;
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}
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// Compute the max in register
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do {
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float32x2_t vlo = vget_low_f32(vmax);
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float32x2_t vhi = vget_high_f32(vmax);
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float32x2_t max0 = vpmax_f32(vlo, vhi);
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float32x2_t max1 = vpmax_f32(max0, max0); // Max is now at max1[0]
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vst1_lane_f32(maxf, max1, 0);
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} while (0);
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// Compute the min in register
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do {
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float32x2_t vlo = vget_low_f32(vmin);
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float32x2_t vhi = vget_high_f32(vmin);
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float32x2_t min0 = vpmin_f32(vlo, vhi);
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float32x2_t min1 = vpmin_f32(min0, min0); // min is now at min1[0]
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vst1_lane_f32(minf, min1, 0);
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} while (0);
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}
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C_FUNC void
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arm_neon_apply_gain_to_buffer(float *dst, uint32_t nframes, float gain)
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{
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while (!IS_ALIGNED_TO(dst, sizeof(float32x4_t)) && nframes > 0) {
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float32_t x0, y0;
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x0 = *dst;
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y0 = x0 * gain;
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*dst = y0;
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++dst;
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--nframes;
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}
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// SIMD portion with aligned buffers
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do {
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float32x4_t g0 = vdupq_n_f32(gain);
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while (nframes >= 8) {
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float32x4_t x0, x1, y0, y1;
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x0 = vld1q_f32(dst + 0);
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x1 = vld1q_f32(dst + 4);
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y0 = vmulq_f32(x0, g0);
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y1 = vmulq_f32(x1, g0);
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vst1q_f32(dst + 0, y0);
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vst1q_f32(dst + 4, y1);
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dst += 8;
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nframes -= 8;
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}
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while (nframes >= 4) {
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float32x4_t x0, y0;
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x0 = vld1q_f32(dst);
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y0 = vmulq_f32(x0, g0);
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vst1q_f32(dst, y0);
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dst += 4;
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nframes -= 4;
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}
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while (nframes >= 2) {
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float32x2_t x0, y0;
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x0 = vld1_f32(dst);
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y0 = vmul_n_f32(x0, gain);
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vst1_f32(dst, y0);
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dst += 2;
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nframes -= 2;
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}
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} while (0);
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// Do the remaining portion one sample at a time
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while (nframes > 0) {
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float32_t x0, y0;
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x0 = *dst;
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y0 = x0 * gain;
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*dst = y0;
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++dst;
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--nframes;
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}
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}
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C_FUNC void
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arm_neon_mix_buffers_with_gain(
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float *__restrict dst, const float *__restrict src,
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uint32_t nframes, float gain)
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{
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// While buffers aren't aligned, then process one sample at a time
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while (!(IS_ALIGNED_TO(src, sizeof(float32x4_t)) &&
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IS_ALIGNED_TO(dst, sizeof(float32x4_t))) &&
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(nframes > 0)) {
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float32_t x0, y0;
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x0 = *src;
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y0 = *dst;
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y0 = y0 + (x0 * gain);
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*dst = y0;
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++dst;
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++src;
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--nframes;
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}
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// Use NEON when buffers are aligned
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do {
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float32x4_t g0 = vdupq_n_f32(gain);
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while (nframes >= 8) {
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float32x4_t x0, x1, y0, y1;
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x0 = vld1q_f32(src + 0);
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x1 = vld1q_f32(src + 4);
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y0 = vld1q_f32(dst + 0);
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y1 = vld1q_f32(dst + 4);
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y0 = vmlaq_f32(y0, x0, g0);
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y1 = vmlaq_f32(y1, x1, g0);
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vst1q_f32(dst + 0, y0);
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vst1q_f32(dst + 4, y1);
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src += 8;
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dst += 8;
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nframes -= 8;
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}
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while (nframes >= 4) {
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float32x4_t x0, y0;
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x0 = vld1q_f32(src);
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y0 = vld1q_f32(dst);
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y0 = vmlaq_f32(y0, x0, g0);
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vst1q_f32(dst, y0);
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src += 4;
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dst += 4;
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nframes -= 4;
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}
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while (nframes >= 2) {
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float32x2_t x0, y0;
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x0 = vld1_f32(src);
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y0 = vld1_f32(dst);
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y0 = vmla_n_f32(y0, x0, gain);
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vst1_f32(dst, y0);
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src += 2;
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dst += 2;
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nframes -= 2;
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}
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} while (0);
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// Do the remaining samples
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while (nframes > 0) {
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float32_t x0, y0;
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x0 = *src;
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y0 = *dst;
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y0 = y0 + (x0 * gain);
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*dst = y0;
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++dst;
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++src;
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--nframes;
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}
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}
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C_FUNC void
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arm_neon_mix_buffers_no_gain(float *dst, const float *src, uint32_t nframes)
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{
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// While buffers aren't aligned, then process one sample at a time
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while (!(IS_ALIGNED_TO(src, sizeof(float32x4_t)) &&
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IS_ALIGNED_TO(dst, sizeof(float32x4_t))) &&
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(nframes > 0)) {
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float32_t x0, y0;
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x0 = *src;
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y0 = *dst;
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y0 = y0 + x0;
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*dst = y0;
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++src;
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++dst;
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--nframes;
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}
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// Use NEON when buffers are aligned
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do {
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while (nframes >= 8) {
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float32x4_t x0, x1, y0, y1;
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x0 = vld1q_f32(src + 0);
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x1 = vld1q_f32(src + 4);
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y0 = vld1q_f32(dst + 0);
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y1 = vld1q_f32(dst + 4);
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y0 = vaddq_f32(y0, x0);
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y1 = vaddq_f32(y1, x1);
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vst1q_f32(dst + 0, y0);
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vst1q_f32(dst + 4, y1);
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src += 8;
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dst += 8;
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nframes -= 8;
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}
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while (nframes >= 4) {
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float32x4_t x0, y0;
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x0 = vld1q_f32(src);
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y0 = vld1q_f32(dst);
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y0 = vaddq_f32(y0, x0);
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vst1q_f32(dst, y0);
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src += 4;
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dst += 4;
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nframes -= 4;
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}
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} while (0);
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// Do the remaining samples
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while (nframes > 0) {
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float32_t x0, y0;
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x0 = *src;
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y0 = *dst;
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y0 = y0 + x0;
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*dst = y0;
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++src;
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++dst;
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--nframes;
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}
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}
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C_FUNC void
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arm_neon_copy_vector(
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float *__restrict dst, const float *__restrict src,
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uint32_t nframes)
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{
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// While buffers aren't aligned, then process one sample at a time
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while (!(IS_ALIGNED_TO(src, sizeof(float32x4_t)) &&
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IS_ALIGNED_TO(dst, sizeof(float32x4_t))) &&
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(nframes > 0)) {
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*dst++ = *src++;
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--nframes;
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}
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// Use NEON when buffers are aligned
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do {
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while (nframes >= 16) {
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float32x4_t x0, x1, x2, x3;
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x0 = vld1q_f32(src + 0 );
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x1 = vld1q_f32(src + 4 );
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x2 = vld1q_f32(src + 8 );
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x3 = vld1q_f32(src + 12);
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vst1q_f32(dst + 0 , x0);
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vst1q_f32(dst + 4 , x1);
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vst1q_f32(dst + 8 , x2);
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vst1q_f32(dst + 12, x3);
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src += 16;
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dst += 16;
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nframes -= 16;
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}
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while (nframes >= 8) {
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float32x4_t x0, x1;
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x0 = vld1q_f32(src + 0);
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x1 = vld1q_f32(src + 4);
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vst1q_f32(dst + 0, x0);
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vst1q_f32(dst + 4, x1);
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src += 8;
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dst += 8;
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nframes -= 8;
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}
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while (nframes >= 4) {
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float32x4_t x0;
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x0 = vld1q_f32(src);
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vst1q_f32(dst, x0);
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src += 4;
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dst += 4;
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nframes -= 4;
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}
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} while (0);
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// Do the remaining samples
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while (nframes > 0) {
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*dst++ = *src++;
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--nframes;
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}
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}
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#endif
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