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Use 64bit alignment for LV2 event buffer #9748

This commit is contained in:
Robin Gareus 2024-07-20 16:41:41 +02:00
parent cb5b955a74
commit 8c583f8e20
Signed by: rgareus
GPG Key ID: A090BCE02CF57F04

View File

@ -26,6 +26,7 @@
#include <lv2/lv2plug.in/ns/ext/event/event.h> #include <lv2/lv2plug.in/ns/ext/event/event.h>
#endif #endif
#include "pbd/malign.h"
#include "ardour/lv2_evbuf.h" #include "ardour/lv2_evbuf.h"
using namespace ARDOUR; using namespace ARDOUR;
@ -48,9 +49,16 @@ ARDOUR::lv2_evbuf_new (uint32_t capacity,
uint32_t atom_Chunk, uint32_t atom_Chunk,
uint32_t atom_Sequence) uint32_t atom_Sequence)
{ {
// FIXME: memory must be 64-bit aligned LV2_Evbuf* evbuf;
LV2_Evbuf* evbuf = (LV2_Evbuf*)malloc(
sizeof(LV2_Evbuf) + sizeof(LV2_Atom_Sequence) + capacity); int err = cache_aligned_malloc ((void**) &evbuf, sizeof(LV2_Evbuf) + sizeof(LV2_Atom_Sequence) + capacity);
if (err) {
//fatal << string_compose (_("Memory allocation error: (%1)"), strerror (err)) << endmsg;
abort ();
return 0;
}
evbuf->capacity = capacity; evbuf->capacity = capacity;
evbuf->atom_Chunk = atom_Chunk; evbuf->atom_Chunk = atom_Chunk;
evbuf->atom_Sequence = atom_Sequence; evbuf->atom_Sequence = atom_Sequence;
@ -61,7 +69,7 @@ ARDOUR::lv2_evbuf_new (uint32_t capacity,
void void
ARDOUR::lv2_evbuf_free (LV2_Evbuf* evbuf) ARDOUR::lv2_evbuf_free (LV2_Evbuf* evbuf)
{ {
free(evbuf); cache_aligned_free (evbuf);
} }
void void