From 68c13940e3b24e89bed39efc4e741298cc6d2637 Mon Sep 17 00:00:00 2001 From: Robin Gareus Date: Mon, 9 Sep 2019 18:54:49 +0200 Subject: [PATCH] Implement denormal protection for ARM --- libs/ardour/globals.cc | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/libs/ardour/globals.cc b/libs/ardour/globals.cc index a2f425de5e..7233370a11 100644 --- a/libs/ardour/globals.cc +++ b/libs/ardour/globals.cc @@ -672,6 +672,7 @@ ARDOUR::setup_fpu () } #if defined(ARCH_X86) && defined(USE_XMMINTRIN) + /* see also https://carlh.net/plugins/denormals.php */ int MXCSR; @@ -717,6 +718,31 @@ ARDOUR::setup_fpu () _mm_setcsr (MXCSR); +#elif defined(__aarch64__) + /* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0488d/CIHCACFF.html + * bit 24: flush-to-zero */ + if (Config->get_denormal_model() != DenormalNone) { + uint64_t cw; + __asm__ __volatile__ ( + "mrs %0, fpcr \n" + "orr %0, %0, #0x1000000 \n" + "msr fpcr, %0 \n" + "isb \n" + : "=r"(cw) :: "memory"); + } + +#elif defined(__arm__) + /* http://infocenter.arm.com/help/topic/com.arm.doc.dui0068b/BCFHFBGA.html + * bit 24: flush-to-zero */ + if (Config->get_denormal_model() != DenormalNone) { + uint32_t cw; + __asm__ __volatile__ ( + "vmrs %0, fpscr \n" + "orr %0, %0, #0x1000000 \n" + "vmsr fpscr, %0 \n" + : "=r"(cw) :: "memory") + } + #endif }