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improve logic flow

This commit is contained in:
Paul Davis 2015-04-21 11:38:34 -04:00
parent 80d8e86f1c
commit 63b3967724

View File

@ -408,8 +408,7 @@ def build(bld):
obj.source += [ 'sse_functions_xmm.cc', 'sse_functions.s' ] obj.source += [ 'sse_functions_xmm.cc', 'sse_functions.s' ]
elif bld.env['build_target'] == 'x86_64': elif bld.env['build_target'] == 'x86_64':
obj.source += [ 'sse_functions_xmm.cc', 'sse_functions_64bit.s' ] obj.source += [ 'sse_functions_xmm.cc', 'sse_functions_64bit.s' ]
elif bld.env['build_target'] == 'mingw':
if bld.env['build_target'] == 'mingw':
import platform as PLATFORM import platform as PLATFORM
u = PLATFORM.uname () u = PLATFORM.uname ()
cpu = u[4] cpu = u[4]