93 lines
1.4 KiB
C++
93 lines
1.4 KiB
C++
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#define _XOPEN_SOURCE 600
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#include <stdlib.h>
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#include <stdint.h>
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#include <pbd/fpu.h>
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#include <pbd/error.h>
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#include "i18n.h"
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using namespace PBD;
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using namespace std;
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FPU::FPU ()
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{
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unsigned long cpuflags = 0;
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_flags = Flags (0);
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#ifndef ARCH_X86
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return;
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#endif
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#ifndef USE_X86_64_ASM
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asm volatile (
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"mov $1, %%eax\n"
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"pushl %%ebx\n"
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"cpuid\n"
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"movl %%edx, %0\n"
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"popl %%ebx\n"
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: "=r" (cpuflags)
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:
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: "%eax", "%ecx", "%edx", "memory"
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);
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#else
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asm volatile (
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"pushq %%rbx\n"
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"movq $1, %%rax\n"
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"cpuid\n"
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"movq %%rdx, %0\n"
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"popq %%rbx\n"
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: "=r" (cpuflags)
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:
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: "%rax", "%rcx", "%rdx", "memory"
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);
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#endif /* USE_X86_64_ASM */
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if (cpuflags & (1<<25)) {
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_flags = Flags (_flags | (HasSSE|HasFlushToZero));
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}
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if (cpuflags & (1<<26)) {
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_flags = Flags (_flags | HasSSE2);
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}
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if (cpuflags & (1 << 24)) {
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char* fxbuf = 0;
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if (posix_memalign ((void**)&fxbuf, 16, 512)) {
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error << _("cannot allocate 16 byte aligned buffer for h/w feature detection") << endmsg;
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} else {
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asm volatile (
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"fxsave (%0)"
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:
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: "r" (fxbuf)
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: "memory"
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);
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uint32_t mxcsr_mask = *((uint32_t*) &fxbuf[28]);
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/* if the mask is zero, set its default value (from intel specs) */
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if (mxcsr_mask == 0) {
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mxcsr_mask = 0xffbf;
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}
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if (mxcsr_mask & (1<<6)) {
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_flags = Flags (_flags | HasDenormalsAreZero);
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}
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free (fxbuf);
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}
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}
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}
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FPU::~FPU ()
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{
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}
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