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58 Commits

Author SHA1 Message Date
Robin Gareus eeaf0bdadc
Fix non-intel arch builds (cpuid.h header) 2023-02-09 20:54:46 +01:00
Ayan Shafqat bb31125c94
Fix CPUID to detect AVX512F 
CPUID is part of x86_64 ISA to query CPU features. In order to determine
AVX512F ISA extension, EAX and ECX needs to be set to 7 and 0
respectively before invoking `cpuid` instruction. This commit also
removes inline assembly for __cpuid in favor of using compiler provided
intrinsic functions. Both GCC and clang provides __cpuid like function
via __cpuid_count intrinsic.

This commit also creates a portable wrapper over compiler intrinsic
functions, __cpuid and __cpuidex. `cpuid' provides base level ISA query
and `cpuidex` provides extra extension information like AVX512F. These
wrappers lean towards MSVC like API.

References:
CPUID Docs: https://en.wikipedia.org/wiki/CPUID

GCC's ``docs" on __cpuid_count:
https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/config/i386/cpuid.h

Clang's docs on __cpuid_count:
https://clang.llvm.org/doxygen/cpuid_8h.html

MSVC's docs on __cpuid and __cpuidex:
https://learn.microsoft.com/en-us/cpp/intrinsics/cpuid-cpuidex
 2023-02-08 23:20:20 +01:00
Ayan Shafqat bf8fced073
Add CPU detection 2023-02-04 23:07:17 +01:00
John Emmas ef7a5e1b00 For 64-bit compilation, MSVC no longer supports inline assembly 2021-01-07 09:22:43 +00:00
Ayan Shafqat 407882d23d
Add support for Intel/AMD's FMA extension 
By supporting FMA extension, the number of instruction needed
for multiply accumulate to mix channels are reduced. Since,
this extension has been around since middle of 2012, more
computers have this instruction set available.
 2021-01-01 21:05:16 +01:00
Robin Gareus 34159e4594
Fix ARM runtime NEON detection 2020-08-24 22:03:28 +02:00
Robin Gareus a0a4477c84
Fix aarch64 builds 2020-08-24 21:26:38 +02:00
Ayan Shafqat 1f878636c8
Adding NEON detection during runtime 2020-08-24 02:06:35 +02:00
Robin Gareus 0301c47f6b
Update core library GPL boilerplate and (C) from git log 2019-08-03 15:53:17 +02:00
Robin Gareus 2f91bdfa53
NO-OP: <tab> after <space> fixes in libs 2019-04-13 19:19:29 +02:00
Tim Mayberry ed09a68f24 Fix for conflicting definition of _xgetbv with mingw-w64 >= 5 
Simplify the #ifdef logic so it is easier to follow and add exceptions in the
future if necessary.
 2016-11-10 15:23:43 +10:00
Paul Davis cf52d6e4b4 enough with umpteen "i18n.h" files. Consolidate on pbd/i18n.h 2016-07-14 14:45:23 -04:00
Florian Weimer 5a41b86028 fix __cpuid() on x86 
The previous version used memory operands that gcc (probably dependent
on optimization flags and/or version) could address relative to the
stack pointer, but pushing %ebx onto the stack changed it. Here, the
address of the regs array is put into %esi and the individual members
are written into directly.
 2016-03-08 14:54:41 +01:00
Robin Gareus 3dc09d42ab allow to override FPU detection 2016-03-04 18:05:47 +01:00
Robin Gareus 22b07e0233 NOOP, remove trailing tabs/whitespace. 2015-10-05 16:17:49 +02:00
Paul Davis 4dc63966f0 globally remove all trailing whitespace from ardour code base. 
Paul Davis was responsible for introducing almost all of this.
 2015-10-04 14:51:05 -04:00
Robin Gareus eb998b3264 plug some memory leaks in libs 2015-09-12 20:05:25 +02:00
John Emmas 1d2938b162 Add '_xgetbv()' for MSVC-9 and earlier 2015-08-16 13:14:54 +01:00
Paul Davis f77a409b0c tweaks for AVX detection 2015-08-14 08:53:06 -04:00
Robin Gareus 5a304e9e33 fix PPC builds 2015-08-12 19:16:01 +02:00
Paul Davis c86b82aa8a comment tweak to show that the __cpuid() intrinsic belongs to MSVC and mingw 2015-08-11 23:45:52 -04:00
Robin Gareus 94b6e7ffe4 fix mingw compilation 2015-08-12 05:25:29 +02:00
Paul Davis b6f9bbeb2f can't use xgetbv instruction with apple gcc under OS X Lion 2015-08-11 23:06:47 -04:00
Paul Davis 41ccfee7a4 clean up FPU code with some ideas from Chromium and the web 2015-08-11 23:00:13 -04:00
Paul Davis bb399c8787 fix stupid logic error in testing separate bits required for AVX support 2015-08-11 20:18:38 -04:00
Paul Davis bb5c969ac0 improved solution for xgetbv() on windows and linux with all compilers 2015-08-11 17:45:41 -04:00
Paul Davis 53bc2ba2c1 #ifdef out AVX detection on APPLE 2015-08-11 17:30:33 -04:00
Paul Davis c0ad97c179 add required test of OS support for AVX register use 2015-08-11 17:23:11 -04:00
Paul Davis 4079855507 add test for CPU/FPU AVX capabilities 2015-08-11 16:36:46 -04:00
John Emmas a3209b9b91 Correctly dereference 'fxbuf' when building with MSVC 2015-04-30 18:17:24 +01:00
John Emmas fe3aafec1c When testing for x86 / x64 architecture, don't forget the symbols that MSVC can understand 2015-04-30 18:17:23 +01:00
Robin Gareus 6cb742c289 windows 32bit asm/fpu support. 
This still leaves cache_aligned_malloc() in
libs/pbd/malign.cc pending _aligned_free (windows crashes when using
free() on memory allocated with _aligned_malloc()).

So far however there seems to be no issue with default malloc
for audio+midi buffers on win32…
 2015-04-24 02:43:52 +02:00
Paul Davis e015c57663 <intrin.h> is for windows only 2015-04-21 12:31:02 -04:00
Paul Davis e3156c2cc4 add required header for windows compile of FPU code 2015-04-21 12:25:21 -04:00
Paul Davis 9241f58188 fix build of FPU code on OS X by reverting to use of _LP64 to identify 32/64 bit situation 2015-04-21 12:13:00 -04:00
Paul Davis a5d7e8446b merge all mingw and msvc specific code for FPU information into libs/pbd/fpu.cc and remove msvc-specific version 2015-04-21 11:39:31 -04:00
Greg Zharun 8af992c449 [Summary] Added SSE sound processing functions support for Windows. Version 1. 
Conflicts:
	wscript
 2015-04-21 10:49:00 -04:00
Paul Davis 658bb3ccd4 finished merge of cairocanvas with windows and windows+cc branches 2014-01-10 17:11:10 -05:00
Paul Davis 3020b224fa Merge windows+cc branch into cairocanvas branch. Not finished, need to now merge windows branch to get changes from there 2014-01-10 16:07:57 -05:00
Paul Davis b7835cd7b1 workaround compilation issues with assembler in fpu code and mingw 2013-12-05 14:45:17 -05:00
Paul Davis 0cca272431 try to fix various warnings from gcc when optimization flags are enabled 2013-11-04 21:32:41 -05:00
John Emmas 7b480eaa27 Windows (compiler specific) includes for libpbd 2013-07-16 18:00:49 +01:00
Paul Davis 58a027b7a2 add copyright comments 
git-svn-id: svn://localhost/ardour2/branches/3.0@13857 d708f5d6-7413-0410-9779-e7cbd77b26cf
 2013-01-16 18:15:38 +00:00
David Robillard 8647471379 Fix posix_memalign checks. 
git-svn-id: svn://localhost/ardour2/branches/3.0@12316 d708f5d6-7413-0410-9779-e7cbd77b26cf
 2012-05-17 00:54:43 +00:00
Carl Hetherington 312c4e22a7 Align the address of the pointer to the fxsave block to a 16-byte boundary (as well as the pointer itself), which the internets seem to suggest is required. 
git-svn-id: svn://localhost/ardour2/branches/3.0@12313 d708f5d6-7413-0410-9779-e7cbd77b26cf
 2012-05-16 22:43:23 +00:00
Paul Davis a556546291 explain MXCSR shenanigans in libs/pbd/fpu.cc 
git-svn-id: svn://localhost/ardour2/branches/3.0@11079 d708f5d6-7413-0410-9779-e7cbd77b26cf
 2011-12-26 22:32:21 +00:00
Paul Davis 639bb7dc5d use compiler-generated _LP64 macro to detect x86_64 rather than USE_X86_64_ASM 
git-svn-id: svn://localhost/ardour2/branches/3.0@10871 d708f5d6-7413-0410-9779-e7cbd77b26cf
 2011-12-02 20:38:31 +00:00
Paul Davis 639542b410 build fixes for OS X 
git-svn-id: svn://localhost/ardour2/branches/3.0@8006 d708f5d6-7413-0410-9779-e7cbd77b26cf
 2010-11-10 23:13:29 +00:00
Paul Davis c6d5124269 update comments on register clobbering 
git-svn-id: svn://localhost/ardour2/branches/3.0@6423 d708f5d6-7413-0410-9779-e7cbd77b26cf
 2009-12-31 18:19:46 +00:00
Paul Davis 569226e64e un-fix register clobber list for gcc on x86 
git-svn-id: svn://localhost/ardour2/branches/3.0@6422 d708f5d6-7413-0410-9779-e7cbd77b26cf
 2009-12-31 18:16:03 +00:00